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• AArch32
  #REDIRECT [[ARMv8#AArch32]]
  27 bytes (3 words) - 01:26, 25 September 2018

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• AArch32
  #REDIRECT [[ARMv8#AArch32]]
  27 bytes (3 words) - 01:26, 25 September 2018
• Endian
  ...can store data in either format (though sometimes not instructions). ARM [[AArch32]] and [[AArch64]] systems, PowerPC, Alpha, recent SPARC, MIPS, and Itanium
  3 KB (458 words) - 12:31, 26 September 2019
• Register
  ...s) or implicitly (as the result of other operations). For example, the ARM AArch32 "Z" flag is set ("1") if an operation has a zero result, and cleared ("0")
  3 KB (439 words) - 17:18, 13 September 2022
• OpCode
  ...bit left shift into a single 32-bit [[Word|word]]. All instructions in the AArch32 [[Instruction Set Architecture|ISA]] are the same length.
  1 KB (161 words) - 00:42, 20 February 2018
• Fall 2014 SPO600 Packages by Participant
  ** arm32 == aarch32 == armhf == armv7hl *** Debian: Available for x86_64, aarch32, x86_32
  18 KB (2,706 words) - 01:13, 26 October 2014
• ARMv8
  === AArch32 Execution State === AArch32 is a 32-bit execution state which supports these instruction sets:
  14 KB (2,290 words) - 21:33, 5 October 2022