Changes

Jump to: navigation, search

Computer Architecture

614 bytes added, 15:35, 25 January 2018
Memory Design
The cache size and type, page size, levels of memory maps (one to three levels of indirection are common), and page attributes vary significantly between computer architectures.
 
 
== Execution State, Priviledge State, Rings, or Privilege Level ==
 
Most processors have multiple privilege levels so that certain instructions can only be executed by certain software. On a modern system, this typically includes a hypervisor level (for virtual machine management), operating system level, and user level, and the names and number of levels vary. The higher-privilege modes can set up memory maps and access devices which are not available to lower-privilege levels; this forces certain operations to be performed by the operating system or hypervisor so that security policies can be enforced.
== Interrupts and Exceptions ==

Navigation menu