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Computer Architecture

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Interrupts and Exceptions
Hardware interrupt requests (IRQs) are external electrical signals which cause the CPU to stop executing the current program (generally between instructions) and jump to a pre-defined block of code. This is typically used to make the operating system service I/O requests as soon as they occur. For example, when a sector of data is available from a disk drive, the disk controller will trigger an interrupt on the CPU, which will cause the operating system to load the received data. This may change the status of a processed from blocked (waiting for data) to eligible for execution, so that it will be considered along with all other eligible processes when the next process switch is performed.
Most architectures support multiple levels of interrupts, usually numbered (e.g., "IRQ0", "IRQ8", and so forth). These may be handled by the CPU itself, or a (programmable) interrupt controller (''PIC'' or ''APIC'') may latch the IRQ event and signal the processor, which then queries the interrupt controller to determine which interrupt occurred. Some architectures support multiple types of levels of interrupts -- the 6502 supports regular (IRQ) and higher-priority non-maskable interrupts (NMI) interrupts, while ARM processors offer both regular (IRQ) and "fast" interrupts (FIQ).
Software interrupts are similar to hardware interrupts, but are triggered by a specific instruction. x86, ARM, and PPC processors use software interrupts to invoke system calls.

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