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Winter 2018 SPO600 Weekly Schedule

7,631 bytes added, 16:10, 18 April 2018
Evaluation
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|7||Mar 5||[[#Week 7 - Class I|Project HackingDiscussion]]||[[#Week 7 - Class II|Virtual memory: Paging, translation tables, cache, and faultsProfiling]]||[[#Week 7 Deliverables|Blog about your project.]]
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|8||Mar 12||[[#Week 8 - Class I|Sysadmin for Programmers, Project HackingDiscussion]]||[[#Week 8 - Class II|Memory barriers]]||[[#Week 8 Deliverables|Blog about your project.]]
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|9||Mar 19||[[#Week 9 - Class I|Project HackingMemory (continued), Building and testing software]]||[[#Week 9 - Class II|Atomics]]||[[#Week 9 Deliverables|Blog about your project.]]
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|10||Mar 26||[[#Week 10 - Class I|Guest speaker (tentative)Project Hacking]]||[[style="background: #Week 10 - Class IIf0f0ff" align="center|Project Hacking]]Good Friday (Holiday)||[[#Week 10 Deliverables|Blog about your project.]]
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|12||Apr 9||[[#Week 12 - Class I|<strike>Project Hacking</strike> <span style="color: #ff0000"><b>Class cancelled</b></span>]]||[[#Week 12 - Class II|Project Hacking]]||[[#Week 12 Deliverables|Blog about your project.]]
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!Category!!Percentage!!Evaluation Dates
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|Communication||align="right"|20%||January (blog posts up to Feb 4, 5%), End of February (March 4, 5%), End of March (April 2, 5%), end of course (April 21 - 22, 5%).
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|Quizzes||align="right"|10%||May be held during any class, usually at the start of class. A minimum of 5 one-page quizzes will be given. No make-up/retake option is offered if you miss a quiz. Lowest 3 scores will not be counted.
|Labs||align="right"|10%||See deliverables column above. All labs must be submitted by April 21, but it is best if you stay on top of the labs and submit according to the table above.
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|Project work||align="right"|60%||3 stages: 15% (date TBAMarch 18), 20% (date TBAApril 10), 25% (April 2122).
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* [[Addressing Mode|Processor Addressing Modes]]
* Navigating CPU technical documentation
* A (very) quick into intro to GDB
* [[Winter 2018 SPO600 Project|Project]]: Selecting, Building, Benchmarking, and Profiling
* Blog your Lab 5 and 6 results.
* Start blogging about your project.
* '''Reminder:''' Blogs will be marked as they stand at 11:59 on March 4, the Sunday at the end of Reading Week.
== Week 7 == === Week 7 - Class I ===* Project Discussion === Week 7 - Class II ===* [[Profiling]] === Week 7 Deliverables ===* Complete your [[Winter_2018_SPO600_Project#Stage_1|Stage I]] project posts on your blog. == Week 8 == === Week 8 - Class I ===* Sysadmin for Developers* Project Discussion === Week 8 - Class II === ==== Overview/Review of Processor Operation ==== * Fetch-decode-dispatch-execute cycle* Pipelining* Branch Prediction* In-order vs. Out-of-order execution** Micro-ops ==== Memory Basics ==== * Organization of Memory** System organization** Process organization*** Text, data*** Stack*** Heap* Memory Speeds* Cache** Cache lookup** Cache synchronization and invalidation** Cache line size* Prefetch** Prefetch hinting ==== Memory Architecture ==== * Virtual Memory and Memory Management Units (MMUs)** General principles of VM and operation of MMUs** Memory protection*** Unmapped Regions*** Write Protection*** Execute Protection*** Privilege Levels** Swapping** Text sharing** Data sharing** Shared memory for Inter-Process Communication** Copy-on-Write (CoW)** Demand Loading** Memory mapped files === Software Impact ===* Alignment checks* Page boundary crossing === Week 8 Delivarables ===* Blog about your project == Week 9 == === Week 9 - Class I === ==== Atomics ====* '''Atomics''' are operations which must be completed in a single step (or appear to be completed in a single step) without potential interruption.** Wikipedia has a good basic overview of the need for atomicity in the article on [http://en.wikipedia.org/wiki/Linearizability Linerarizability]** Atomics may be performed using special instructions or Kernel-compiler cooperation ==== Memory Barriers ===='''Memory Barriers''' ensure that memory accesses are sequenced so that multiple threads, processes, cores, or IO devices see a predictable view of memory.* Leif Lindholm provides an excellent explanation of memory barriers.** Blog series - I recommend this series, especially the introduction, as a very clear explanation of memory barrier issues.*** Part 1 - [http://community.arm.com/groups/processors/blog/2011/03/22/memory-access-ordering--an-introduction Memory Access Ordering - An Introduction]*** Part 2 - [http://community.arm.com/groups/processors/blog/2011/04/11/memory-access-ordering-part-2--barriers-and-the-linux-kernel Memory Access Ordering Part 2 - Barriers and the Linux Kernel]*** Part 3 - [http://community.arm.com/groups/processors/blog/2011/10/19/memory-access-ordering-part-3--memory-access-ordering-in-the-arm-architecture Memory Access Ordering Part 3 - Memory Access Ordering in the ARM Architecture]** Presentation at Embedded Linux Conference 2010 (Note: Acquire/Release in C++11 and ARMv8 aarch64 appeared after this presentation):*** [http://elinux.org/images/f/fa/Software_implications_memory_systems.pdf Slides]*** [http://free-electrons.com/pub/video/2010/elce/elce2010-lindholm-memory-450p.webm Video]* [http://www.rdrop.com/users/paulmck/scalability/paper/whymb.2010.07.23a.pdf Memory Barriers - A Hardware View for Software Hackers] - This is a highly-rated paper that explains memory barrier issues - as the title suggests, it is designed to describe the hardware origin of the problem to software developers. Despite the fact that it is an introduction to the topic, it is still very technical.* [http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.faqs/ka14041.html ARM Technical Support Knowlege Article - In what situations might I need to insert memory barrier instructions?] - Note that there are some additional mechanisms present in ARMv8 aarch64, including Acquire/Release.* [https://www.kernel.org/doc/Documentation/memory-barriers.txt Kernel Documentation on Memory Barriers] - discusses the memory barrier issue generally, and the solutions used within the Linux kernel. This is part of the kernel documentation.* Acquire-Release mechanisms** [http://blogs.msdn.com/b/oldnewthing/archive/2008/10/03/8969397.aspx MSDN Blog Post] with a very clear explanation of Acquire-Release.** [http://preshing.com/20130922/acquire-and-release-fences/ Preshing on Programming post] with a good explanation.** [http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.genc010197a/index.html ARMv8 Instruction Set Architecture Manual] (ARM InfoCentre registration required) - See the section on Acquire/Release and Load/Store, especially Load/Store Exclusive (e.g., LDREX) ==== The Future of Memory ====* NUMA (on steroids!)* Non-volatile, byte-addressed main memory* Non-local memory / Memory-area networks* Memory encryption ==== Building Software ====* Configuration Systems** make-based systems*** [https://www.gnu.org/software/automake/manual/html_node/index.html#Top The GNU Build System: autotools, autoconf, automake]*** Configuration name ("triplet") -- ''cpu-manufacturer-operatingSystem'' or ''cpu-manufacturer-kernel-operatingSystem''**** config.guess and config.sub*** CMake*** qmake*** Meson*** iMake and Others** Non-make-based systems*** Apache Ant*** Apache Maven*** Qt Build System* Building in the Source Tree vs. Building in a Parallel Tree** Pros and Cons** [https://www.gnu.org/software/automake/manual/html_node/VPATH-Builds.html#VPATH-Builds GNU automake ''vpath'' builds]* Installing and Testing in non-system directories** Configuring installation to a non-standard directory*** Running <code>configure</code> with <code>--prefix</code>*** Running <code>make install</code> as a non-root user*** DESTDIR variable for <code>make install</code>** Runtime environment variables:*** PATH*** LD_LIBRARY_PATH and LD_PRELOAD (see the [http://man7.org/linux/man-pages/man8/ld.so.8.html ld.so manpage])** Security when running software*** Device access**** Opening a TCP/IP or UDP/IP port below 1024**** Accessing a <code>/dev</code> device entry***** Root permission***** Group permission*** SELinux Type Enforcement**** Enforcement mode***** View enforcement mode: <code>getenforce</code>***** Set enforcement mode: <code>setenforce</code>**** Changing policy***** [https://fedoraproject.org/wiki/SELinux/audit2why audit2why]***** [https://fedoraproject.org/wiki/SELinux/audit2why audit2allow] === Week 9: Class II ===* Portability Issues === Week 9 Deliverables ===* Blog about your project == Week 10 == === Week 10: Class I ===* Project hacking and discussion === Week 10 Deliverables ===* Blog about your project.* Note: March blogs are due Monday, April 2. Remember that the target is 1-2 posts/week, which is 4-8 posts/month. == Week 11 == === Week 11 - Class I ===* Project hacking and discussion === Week 11 - Class II ===* [[Compiler Intrinsics]]* Project discussion == Week 12 == === Week 12 - Class I ===* Class cancelled === Week 12 - Class II ===* Project hacking and discussion  <!-- ###############################################################################################################################################################################################################################################################################################################################################################################################################################
== Week 6 ==
* [[SPO600 Algorithm Selection Lab|Algorithm Selection Lab]] (Lab 6)
== Week 7 ==
 
=== Week 7 - Class I ===
 
Project discussion
 
=== Week 7 - Class II ===
 
Profiling
 
=== Week 7 Deliverables ===
 
Blog about your project.
=== Week 6 Deliverables ===

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