Difference between revisions of "Instruction Set Architecture"
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| − | [[Category:Computer Architecture]]{{Chris Tyler Draft}}The Instruction Set Architecture of a processor is the set of instructions which that processor can execute and the encoding of those instructions as [[Machine Language|machine code]]. | + | [[Category:Computer Architecture]]{{Chris Tyler Draft}}The Instruction Set Architecture of a processor is the set of instructions which that processor can execute, the addressing modes available, and the encoding of those instructions as [[Machine Language|machine code]]. |
Revision as of 18:27, 24 January 2014
This is a draft only!
It is still under construction and content may change. Do not rely on this information.
It is still under construction and content may change. Do not rely on this information.
