Fedora ARM Secondary Architecture/SheevaPlug

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SheevaPlug Specifications

Sheeva CPU Core

1.2 GHz operation L1 Cache: 16K Instruction + 16K Data L2 Cache: 256KB

Memory DDR2 400MHz, 16-bit bus 512MB DDR2: 1Gb x8, 4 devices Power efficient Samsung devices NAND FLASH Controller, 8-bit bus 512MB NAND FLASH: 4Gb x8, direct boot 128-bit eFuse Memory

Power Power input: 100-240VAC/50-60Hz 19W DC Consumption: 5V/3.0A High efficiency POL DC-DC converters

Development Interface System Development Board JTAG and Console Interface via USB SDIO expansion JTAG OpenOCD support via USB

High speed I/O & Peripherals GE, USB 2.0 Host RTC w/ Battery

UL/CE/FCC certified


For more information

Accessing SheevaPlug from a Windows box

Connecting to the Sheevaplug Using Windows


Installing F12 on an SD and booting from the SheevaPlug

Installing F12 on an SD

Configuring U-boot