Difference between revisions of "6502 Instructions - Introduction"
Chris Tyler (talk | contribs) (Created page with "{{Chris Tyler Draft}} Category:6502 The 6502 processor has a compact instruction set, consisting of just 56 instructions: <code> ADC AND ASL BCC BCS BEQ BIT BMI BNE B...") |
Chris Tyler (talk | contribs) |
||
| Line 5: | Line 5: | ||
<code> | <code> | ||
ADC AND ASL BCC BCS BEQ BIT BMI BNE BPL BRK BVC BVS CLC | ADC AND ASL BCC BCS BEQ BIT BMI BNE BPL BRK BVC BVS CLC | ||
| + | |||
CLD CLI CLV CMP CPX CPY DEC DEX DEY EOR INC INX INY JMP | CLD CLI CLV CMP CPX CPY DEC DEX DEY EOR INC INX INY JMP | ||
| + | |||
JSR LDA LDX LDY LSR NOP ORA PHA PHP PLA PLP ROL ROR RTI | JSR LDA LDX LDY LSR NOP ORA PHA PHP PLA PLP ROL ROR RTI | ||
| + | |||
RTS SBC SEC SED SEI STA STX STY TAX TAY TSX TXA TXS TYA | RTS SBC SEC SED SEI STA STX STY TAX TAY TSX TXA TXS TYA | ||
</code> | </code> | ||
| Line 31: | Line 34: | ||
<code> | <code> | ||
LDA ; load the accumulator | LDA ; load the accumulator | ||
| + | |||
LDX ; load the X register | LDX ; load the X register | ||
| + | |||
LDY ; load the Y register | LDY ; load the Y register | ||
</code> | </code> | ||
| Line 39: | Line 44: | ||
<code> | <code> | ||
STA ; store the accumulator | STA ; store the accumulator | ||
| + | |||
STX ; store the X register | STX ; store the X register | ||
| + | |||
STY ; store the Y register | STY ; store the Y register | ||
</code> | </code> | ||
| Line 45: | Line 52: | ||
=== Push/Pull on the Stack === | === Push/Pull on the Stack === | ||
| − | There are | + | When a value is pushed to the stack, the stack pointer is decremented and the selected register is written to $0100+SP. |
| + | |||
| + | When a value is pulled from the stack, the stack pointer is incremented and the selected register is loaded from $0100+SP. | ||
| + | |||
| + | There are two instructions to push data onto the stack: | ||
<code> | <code> | ||
PHA ; push the accumulator | PHA ; push the accumulator | ||
| + | |||
PHP ; push the processor status register | PHP ; push the processor status register | ||
</code> | </code> | ||
| Line 56: | Line 68: | ||
<code> | <code> | ||
PLA ; pull the accumulator | PLA ; pull the accumulator | ||
| + | |||
PLP ; pull the processor status registerI've been swamped!  | PLP ; pull the processor status registerI've been swamped!  | ||
</code> | </code> | ||
| − | + | Note that some other operations, such as JSR, interrupts, RTI, and RTS, cause data to be pushed to or pulled from the stack. | |
| − | |||
| − | |||
| − | |||
| − | Note that some other operations, such as JSR, interrupts, and RTS, cause data to be pushed to or pulled from the stack. | ||
== Bitwise Operations == | == Bitwise Operations == | ||
Revision as of 16:25, 14 September 2021
It is still under construction and content may change. Do not rely on this information.
The 6502 processor has a compact instruction set, consisting of just 56 instructions:
ADC AND ASL BCC BCS BEQ BIT BMI BNE BPL BRK BVC BVS CLC
CLD CLI CLV CMP CPX CPY DEC DEX DEY EOR INC INX INY JMP
JSR LDA LDX LDY LSR NOP ORA PHA PHP PLA PLP ROL ROR RTI
RTS SBC SEC SED SEI STA STX STY TAX TAY TSX TXA TXS TYA
This page groups these instructions and explains their basic function.
Contents
Addressing Modes
There are 13 6502 Addressing Modes. All of these instructions work with at least one addressing mode, and many work with several addressing modes. See the #Resources section for Opcode tables that define which instructions work with which addressing modes.
Performance
Each 6502 instruction takes a defined number of cycles to execute. In some cases,
Loading and Storing Data (to/from Memory)
Register-Memory Loads and Stores
There are three instructions to load data from memory to a register:
LDA ; load the accumulator
LDX ; load the X register
LDY ; load the Y register
And there are three matching instructions to store data from a register to a memory location:
STA ; store the accumulator
STX ; store the X register
STY ; store the Y register
Push/Pull on the Stack
When a value is pushed to the stack, the stack pointer is decremented and the selected register is written to $0100+SP.
When a value is pulled from the stack, the stack pointer is incremented and the selected register is loaded from $0100+SP.
There are two instructions to push data onto the stack:
PHA ; push the accumulator
PHP ; push the processor status register
And two matching instructions to pull data from the stack:
PLA ; pull the accumulator
PLP ; pull the processor status registerI've been swamped! 
Note that some other operations, such as JSR, interrupts, RTI, and RTS, cause data to be pushed to or pulled from the stack.
Bitwise Operations
Arithmetic
ADC ; add with carry
The accumulator + memory location + carry flag is stored to the accumulator (A = A + M + C).
The carry flag can be used to carry overflow information from the lowest byte to the highest byte of a multi-byte addition. Clear the carry flag and then add the lowest bytes, then leave the carry flag untouched and add the second-lowest bytes. Continue to the highest byte in the multi-byte sequence.
